Makefile 覆盖命令

Question

我有以下Makefile

# Compiler
CXX = g++                          
CXXFLAGS = -Wall -std=c++20  
LDFLAGS = -lcurl                           

# Directories
SRC_DIR = src                      
BUILD_DIR = build                  
INC_DIR = include                  

# Source files and object files
SRCS = $(shell find $(SRC_DIR) -name "*.cpp")        
OBJS_FILE_ENDING = $(SRCS:cpp=o)  
OBJS = $(subst src/, build/, $(OBJS_FILE_ENDING))
TARGET = main      

# Main target
all: $(BUILD_DIR)/$(TARGET)

# Linking
$(BUILD_DIR)/$(TARGET): $(OBJS)
    mkdir -p $(BUILD_DIR)
    $(CXX) $(OBJS) -o $@ $(LDFLAGS)

# Compiling
$(BUILD_DIR)/%.o: $(SRC_DIR)/%.cpp
    mkdir -p $(BUILD_DIR)
    $(CXX) $(CXXFLAGS) -I$(INC_DIR) -c $< -o $@

clean:
    rm -rf $(BUILD_DIR)

rebuild: clean all

.PHONY: all clean rebuild

我遇到了问题：

Makefile:27: warning: overriding commands for target `build'
Makefile:22: warning: ignoring old commands for target `build'
make: *** No rule to make target `/%.cpp', needed by `build'.  Stop.

我是 Makefiles 新手，但我不明白这个问题。好像变量有问题？

Answer 1

行尾有空格

BUILD_DIR = build                  $

。 （

$

标记文本的结尾。）这将

BUILD_DIR

设置为

\

build $

Then

$(BUILD_DIR)/$(TARGET): $(OBJS)

looks like

build /main: $( OBJS)

, which is a rule for two targets, one named 

构建

and the other named

/main`。删除行尾的空格。