Basys3 上的 LED 序列与 Verilog

Question

我需要这个用于学校项目。如果 x 为零（这意味着 sw 为 0），教授想要一个 LED 序列：

0000000000000001
0000000000000010
0000000000000100
0000000000001000
0000000000010000
0000000000100000
0000000001000000
0000000010000000
0000000100000000
0000001000000000
0000010000000000
0000100000000000
0001000000000000
0010000000000000
0100000000000000
1000000000000000

来自我们。如果不是的话，情况就会相反。现在我被困在测试台文件中，因为它没有显示看起来像步骤的 LED 向量的变化。这是我的主要代码：

`timescale 1ns / 1ps

module main(
    output [15:0] led,
    input clk,
    input btnC,
    input sw
);

reg [15:0] state;
reg ovr;
reg x;
wire sec;

zaman timer (sec, clk, btnC);

initial begin
    state = 16'b0000000000000001;
    ovr = 1'b0;
    x = 0;
end

always @ (posedge clk) begin
    x <= sw;
    
    if (btnC == 1) begin
        state = 16'b0000000000000001;
        ovr = 1'b0;
    end
    else if (sec == 1) begin
        if (x == 0) begin
            {ovr,state} <= state << 1;
            if (ovr == 1'b1) begin
                state <= 16'b0000000000000001;
                ovr <= 1'b0;
            end
        end
        else if (x == 1) begin
            {state, ovr} <= state >> 1;
            if (ovr == 1'b1) begin
                state <= 16'b1000000000000000;
                ovr <= 1'b0;
            end
        end
    end
    
end
assign led = state;

endmodule

其子模块：

module zaman(
output Y,
input clock,
input reset
);

reg elapsed;
reg [25:0] state;

always @(posedge clock)
if (reset == 1) state <= 0;
else if (state == 50000000) state <= 0;// corresponds to 1 sec
else state <= state + 1;

always @(state)
if (state == 50000000) elapsed = 1;
else elapsed = 0;
assign Y = elapsed;

endmodule

和测试台文件（这很糟糕，因为我做不到）：

`timescale 1ns / 1ps

module maintb;

reg clk;
reg btnC;
reg sw;
wire [15:0] led;
    
main uut(.led(led), .btnC(btnC), .sw(sw), .clk(clk));

always #5 clk = ~clk;

initial begin
    clk = 0;
    btnC = 0;
    sw = 0;
    
    btnC = 1;
    #10;
    btnC = 0;
    
    #160000000;
end

endmodule

我得到的只是这个模拟结果：

Answer 1

您没有让模拟运行足够长的时间，或者您没有将波形缩小到足以看到

led

从 1 变为 2。

您可以将此行添加到您的测试台中：

initial $monitor($time,  " led=%b", led);

我看到这个输出：

                   0 led=0000000000000001
           500000015 led=0000000000000010
          1000000025 led=0000000000000100
          1500000035 led=0000000000001000