modelsim 找不到对象(vish-4014)并且它没有显示任何波形,因此我可以将其添加到范围

问题描述 投票:0回答:1

这是我为 50 套公寓设计的一个有趣的灭火系统的代码。这是 fire_detection_system.v:

module fire_detection_system (
    input wire clk, // Clock signal
    input wire reset, // Reset signal
    input wire [49:0] smoke_detectors, // Smoke sensor signal
    input wire [4:0] floor_buttons, // Buttons on each floor
    input wire janitor_button, // Janitor button
    output wire [49:0] sprinkler_activate // Sprinkler activation signal
);
    reg [5:0] timer; // 6-bit timer for 60-second delay
    reg [1:0] state; // State machine: 00 (idle), 01 (waiting), 10 (active)
    
    assign sprinkler_activate = (state == 2'b10) ? smoke_detectors : 50'b0;  // Activate sprinklers in active state
    always @(posedge clk or posedge reset) begin
        if (reset) begin
            timer <= 0;
            state <= 2'b00; // Initialize to idle state
        end else begin
            case (state)
                2'b00: // Idle state
                    if (smoke_detectors != 50'b0) begin
                        state <= 2'b01; // Transition to waiting state
                        timer <= 60; // Set timer to 60 seconds
                    end
                2'b01: // Waiting state
                    if (timer > 0) begin // Decrement timer
                        timer <= timer - 1;
                    end else begin
                        state <= 2'b10; // Transition to active state
                    end
                2'b10: // Active state
                    if (floor_buttons != 5'b0 || janitor_button) begin
                        state <= 2'b00; // Reset to idle state on button press
                    end
            endcase
        end
    end

endmodule

这是我的 fire_detection_system_tb.v:

module fire_detection_system_tb;

  // Inputs
  reg clk;
  reg reset;
  reg [49:0] smoke_detectors;
  reg [4:0] floor_buttons;
  reg janitor_button;

  // Outputs
  wire [49:0] sprinkler_activate;

  // Instantiate the fire detection system
  fire_detection_system dut (
    .clk(clk),
    .reset(reset),
    .smoke_detectors(smoke_detectors),
    .floor_buttons(floor_buttons),
    .janitor_button(janitor_button),
    .sprinkler_activate(sprinkler_activate)
  );

  // Clock generation
  always begin
    #5 clk = ~clk;
  end

  initial begin
    // Initialize inputs
    clk = 0;
    reset = 1;
    smoke_detectors = 50'b0;
    floor_buttons = 5'b0;
    janitor_button = 0;

    #10;  // Wait for reset to settle

    // Test cases
    smoke_detectors = 50'b0;
    floor_buttons = 5'b0;
    janitor_button = 0;
    #60;  // Wait for timer to expire

    smoke_detectors = 50'b1;
    floor_buttons = 5'b0;
    janitor_button = 0;
    #60;  // Wait for timer to expire and sprinklers to activate

    smoke_detectors = 50'b1;
    floor_buttons = 5'b1;
    janitor_button = 0;
    #1;  // Wait for button press to be detected

    smoke_detectors = 50'b0;
    floor_buttons = 0;
    janitor_button = 1;
    #60;  // Wait for timer to expire and sprinklers to deactivate

    $finish;
  end

endmodule

我想显示我在 modelsim 范围的初始框中使用的信号,但 modelsim 无法识别此文件中的任何波信号。并且文件已正确编译,没有错误。模拟布局

verilog fpga modelsim intel-fpga
1个回答
0
投票

在模拟布局的附图中,您没有打开“对象”窗口,该窗口将显示“实例”窗口中所选模块中可用的所有信号。通过转到菜单栏上的“查看”并选择“对象”来打开“对象”窗口。打开“对象”窗口后,请确保在“实例”窗口中选择了您的测试平台,然后您将在“对象”窗口中看到来自初始块的信号。

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